1. Field of the Invention
This invention relates to a random access type memory arrangement for a semiconductor memory.
2. Description of the Prior Art
In a prior art random access type semiconductor memory, a data line is divided into two halves, each of which has a plurality of memory cells and a dummy cell, and a differential amplifier is connected between the left half and the right half of the data line. The contents of a desired memory cell connected to one data line half are read out and, at the same time, the contents of a dummy cell connected to the other data line half are also read out. The voltage on either one of the data line halves is detected through a switching element.
However, such a prior art memory has the following disadvantages.
Since only the voltage on one of the digit line halves is detected, it is impossible to read out the data at a high speed and there is the possibility of erroneously detecting the contents of a memory cell due to an electrical imbalance of the data line halves.
Since the data line halves are not geometrically adjacent each other, unbalanced noise signals are produced on the data line halves, thereby causing the differential amplifier to operate erroneously.